ifeq ($(KBUILD_SRC),)
I saw the above in Makefile of linux kernel.
It doesn’t look like regular if statement in most other scripting languages AFAIK.
There’s even no endif closing tag which exists in other places.
How does it work?
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ifeqchecks if both statements are equal. As the second statement is empty, the statement basicalliy checks wether$KBUILD_SRCis empty/unset. By replacingifeqwithifneqit sould check whether the variable is set.The
endifmust be somewhere, otherwise there is a syntax error andmakewill complain.And… as Mario already explained, make uses two phases, the first one parses the Makefile and expands all macros, includes, etc. It also evaluates the conditionals. So afterwards all targets are created according the conditionals and other included Makefiles. In the second phase, make uses the targets and their dependencies (on other targets) to actually execute the commands (to build the kernel for example). The first target encountered is used as ‘parent target’, unless the make command included one or more ‘parent targets’