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Home/ Questions/Q 7733989
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Editorial Team
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Editorial Team
Asked: June 1, 20262026-06-01T07:08:17+00:00 2026-06-01T07:08:17+00:00

I’m a bit confused about the understanding of a mode switch in Unix kernel.

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I’m a bit confused about the understanding of a mode switch in Unix kernel. I give my understanding here and open it for discussion/correction.

While transitioning from user mode to kernel mode, the processor makes a switch between the per-process-user-stack and the per-process-kernel-stack. Then the user-per-process stack segment selector and stack pointer is stored in the kernel stack and then the eip instruction pointer (return address at user mode) and other hardware registers are pushed on to the kernel stack

When the kernel has to return to user mode, the trapret code pops all values stored in the kernel stack back to the hardware registers.

trapret popping the values off the kernel stack

But when iret pops eip from the kernel stack, the next instruction that should get executed is the return address in user mode.

This happens without completely popping the other values of the kernel stack.

How do the rest of the values (%cs, %eflags, %esp, %ss) get restored ?

How is the user-stack-pointer present in kernel stack popped back to %esp ?

Trap Frame during a transition from user mode to kernel mode

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  1. Editorial Team
    Editorial Team
    2026-06-01T07:08:19+00:00Added an answer on June 1, 2026 at 7:08 am

    iret restores all that stuff

    The iret instruction is quite complex. To quote the Intel architecture manual:


    When executing a return from an interrupt or exception handler from a different privilege level than the interrupted procedure, the processor performs these actions:

    1. Performs a privilege check.
    2. Restores the CS and EIP registers to their values prior to the interrupt or
      exception.
    3. Restores the EFLAGS register.
    4. Restores the SS and ESP registers to their values prior to the interrupt or
      exception, resulting in a stack switch back to the stack of the interrupted
      procedure.
    5. Resumes execution of the interrupted procedure.
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