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Asked: May 10, 20262026-05-10T17:34:39+00:00 2026-05-10T17:34:39+00:00

I’m looking at the code for a phase accumulator, and I must be a

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I’m looking at the code for a phase accumulator, and I must be a simpleton because I don’t get it. The code is simple enough:

   Every Clock Tick do:     accum = accum + NCO_param;     return accum; 

accum is a 32-bit register. Obviously, at some point it will roll-over.

My question really is: How does this relate to the phase?

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  1. 2026-05-10T17:34:40+00:00Added an answer on May 10, 2026 at 5:34 pm

    This article may help.

    In the running step, the counter (properly called the phase accumulator) is instructed to advance by a certain increment on each pulse from the frequency reference. The output of the phase accumulator (the phase) is used to select each item in the data table in turn. Finally, the DAC converts this sequence of data to an analogue waveform.

    In the running step, the counter (properly called the phase accumulator) is instructed to advance by a certain increment on each pulse from the frequency reference. The output of the phase accumulator (the phase) is used to select each item in the data table in turn. Finally, the DAC converts this sequence of data to an analogue waveform. To generate a periodic waveform, the circuit is set up so that one pass through the table takes a time equal to the period of the waveform. For example, if the reference frequency is 1 MHz, and the table contains 1000 entries, then a complete pass through the table with a phase increment of 1 will take 1000 / 1 MHz = 1 ms, so the frequency of the output waveform will be 1/(1 ms) = 1 kHz.

    This system can generate a higher output frequency simply by increasing the phase increment so that the counter runs through the table more quickly. In the example above, the phase increment is equal to 1, so the next possible frequency is obtained by setting the increment to 2, resulting in a doubling of output frequency. To obtain a finer control of frequency than this, the standard phase increment can be set to, say, 10. This then allows slightly higher or lower output frequencies. For example, increasing the increment to 11 would increase the output frequency by 10%, and reducing it to 9 would decrease the output frequency by the same proportion. The more precision required over the frequency, the more bits are needed in the counter.

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  • added an answer It's hard to give a generic answer to this. It… May 11, 2026 at 3:35 pm
  • added an answer This is one natural and easy solution: <xsl:stylesheet version='1.0' xmlns:xsl='http://www.w3.org/1999/XSL/Transform'>… May 11, 2026 at 3:35 pm
  • added an answer You're right, it probably would speed things up, though I… May 11, 2026 at 3:35 pm

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