Question

I’m optimizing a sorting function for a numerics/statistics library based on the assumption that, after filtering out any NaNs and doing a little bit twiddling, floats can be compared as 32-bit ints without changing the result and doubles can be compared as 64-bit ints.

This seems to speed up sorting these arrays by somewhere on the order of 40%, and my assumption holds as long as the bit-level representation of floating point numbers is IEEE 754. Are there any real-world CPUs that people actually use (excluding in embedded devices, which this library doesn’t target) that use some other representation that might break this assumption?

---

• https://en.wikipedia.org/wiki/Single-precision_floating-point_format
  (binary32, aka float in systems that use IEEE754)
• https://en.wikipedia.org/wiki/Double-precision_floating-point_format
  (binary64, aka double in systems that use IEEE754)

Answer 1

Other than flawed Pentiums, any x86 or x64-based CPU is using IEEE 754 as their floating-point arithmetic standard.

Here are a brief overview of the FPA standards and their adoptions.

IEEE 754:       Intel x86, and all RISC systems (IBM Power
                and PowerPC, Compaq/DEC Alpha, HP PA-RISC,
                Motorola 68xxx and 88xxx, SGI (MIPS) R-xxxx,
                Sun SPARC, and others);

VAX:            Compaq/DEC

IBM S/390:      IBM (however, in 1998, IBM added an IEEE 754
                option to S/390)

Cray:           X-MP, Y-MP, C-90; other Cray models have been
                based on Alpha and SPARC processors with
                IEEE-754 arithmetic.

Unless your planning on supporting your library on fairly exotic CPU architectures, it is safe to assume that for now 99% of CPUs are IEEE 754 compliant.