Question

I’m trying to do an ifeq inside of a define within a Makefile, but I seem to be running into some errors, and I’m wondering if I’m missing something. I have the following Makefile:

$(info ---- start ----)
ifeq ("X","Y")
$(info DOES not appear_1)
endif

define TESTDEF
ifeq ("X","Y")
$(info SHOULD not appear)
# $(error DEFINITELY SHOULD not error...)
endif
endef

$(eval $(call TESTDEF, 1,2,3))

I’m getting the following error:

---- start ----
SHOULD not appear
Makefile:14: *** DEFINITELY SHOULD not error....  Stop.

Is there some trick that I’m missing? Is it possible to do ifeq’s inside define? (note: this happens on both my native GNU 3.81 make, and on my mips uclibc cross-compiler)

Answer 1

When you call this function, Make evaluates the definition, using whatever parameters you provide (irrelevant in this case). So if the definition includes something like $(info ...) or $(error ...), even in a comment, Make will evaluate it and you’ll see the result (see documentation; I’ve tested it in GNUMake 3.81).

To get the behavior you want, add a couple of dollar signs:

define TESTDEF
ifeq ("X","Y")
$$(info SHALL not appear)
# $$(info DEFINITELY SHALL not error...)
endif
endef

$(eval $(call TESTDEF))