Question

I’m using gcc 4.6.3 compiled for sam7s processor.

I need to use some inline assembly:

int res;
asm volatile (" \
        MRS r0,CPSR     \n  \
        MOV %0, r0      \n  \
        BIC r0,r0,%1    \n  \
        MSR CPSR,r0     \n  \
        " : "=r" (res) : "r" (0xc0) : "r0" );
return res;

Which is translated by gcc to (comments added by me):

mov r3, #192    ; load 0xc0 to r3
str r0, [sl, #56]   ; preserve value of r0?

mrs r0, CPSR    ; load CPSR to r0
mov r3, r0      ; save r0 to "res"; r3 overwritten!
bic r0, r0, r3  ; 
msr CPSR_fc, r0 ; 

The problem is that in place of “%0” (res) and “%1” (constant: 0xc0) the same register “r3” is used. For this reason %1 is overwritten before it is used, and code work incorrectly.

The question is how can I forbid gcc to use the same register for input/output operands?

Answer 1

Ok, finally i’ve found it here

& says that an output operand is written to before the inputs are
read, so this output must not be the same register as any input.
Without this, gcc may place an output and an input in the same
register even if not required by a “0” constraint. This is very
useful, but is mentioned here because it’s specific to an
alternative. Unlike = and %, but like ?, you have to include it
with each alternative to which it applies.

After changing "=r" (res) to "=&r" (res) everything works fine.