Sign Up to our social questions and Answers Engine to ask questions, answer people’s questions, and connect with other people.
Login to our social questions & Answers Engine to ask questions answer people’s questions & connect with other people.
Lost your password? Please enter your email address. You will receive a link and will create a new password via email.
Please briefly explain why you feel this question should be reported.
Please briefly explain why you feel this answer should be reported.
Please briefly explain why you feel this user should be reported.
I’m using VPADAL.U32 instruction to greatly increase my Addition code speed. However, I would need something to subtract with accumulation and carry (exactly what I got as addition).
Wishful thinking or actually possible?
From what I could gather, I’d need to decrement my 2nd operand, then not its bits … do the VPADAL, and then bit-test for a 1, and subtract 1 from the resulting carry (to either get 0 or -1 — my accumulation).
Am I missing an arcane technique somewhere?
You could use VPADDL to pairwise sum the addends and double the width, then use VQSUB to subtract this term from your total.