Question

I’m working in Xilinx Platform Studio, and what I essentially want to do, is have a VHDL module output some values, and then I would like to be able to read that value from another program written in C.

I figure what I want to do is map a specific port in my VHDL module to a spot in memory, and then read from that spot in memory in my C program.

Can someone point me in the right direction on how I would do this?

Answer 1

What I understand from your requirement is that you want to create a custom ip core(VHDL) and then add it as a part a XPS MicroBlaze/PowerPC system, where your core should be accessible by the processor(C programming).

Here you will have to use the Xilinx XPS EDK tools to do the following main steps:

1. First start with Base System Builder to create a processor based system. Select the necessary processor, peripheral and other components for your system.

2. Invoke Create an Import Wizard to create a Custom IPCore. This tool will take you through a features selection procedure for your custom core. Select 2-4 Software Accessible Register feature which are accessible by processor (C programming). Finally the Wizard will generate a set of files, including HDL sources, of an ipcore. The template sources can be found in *xps_prj/pcores/yourcore_v1_00_a*.

3. This is a big step. The generated HDL templates(*yourcore_v1_00_a/hdl/vhdl*) mainly contains a Bus Interface Unit (PLB/FSL) and an Example logic. Here you have to edit the HDL template sources to remove the Example Logic and instantiate your Custom Core Logic. You can divide the IO Ports of your core instance in to two sets. The first which includes IO ports to be accessible by processor(through C programming) should be connected to Software Accessible Registers in the HDL template. The second set of your core IO ports which you want to bring out of FPGA, necessary port mapping should be done to external port connection of the top module.

   Edit the PAO file(*yourcore_v1_00_a/data/yourcore_v1_00_a.pao*) and add your custom core sources in the order you want to synthesis it.

   After all the necessary changes is made in template files invoke Create and Import Wizard tool and Import all the Core changes to XPS environment.

4. Your custom ipcore will be seen in IP Catalog now. Add it as a part of your System and make the necessary Port Connection, Bus Interface and Address Generation for the Custom IPCore in the System.

5. Generate the Netlist and Bitstream of the system using PlatGen.

6. Create a C Application Project. Generate the Libraries using LibGen and compile the C application to generate the ELF file.

7. Using Data2Mem tool merge Hardware Bitstream and Software ELF to download.bit file. Download the bitstream to the platform using Impact tool.

Ref: http://ecasp.ece.iit.edu/mbtutorial.pdf