Home/ Questions/Q 4051944
In Process

The Archive Base Latest Questions

Editorial Team
  • 0
Asked: 2026-05-20T14:15:29+00:00

I’m working with a C++ application in an embedded systems running Linux. This device

  • 0

I’m working with a C++ application in an embedded systems running Linux. This device receives messages (small chunk of few bytes) and need to be stored in a non volatile memory in case of power failure. This worked well with another platform because a static RAM was available.

The problem on this platform is that we only have a NAND Flash to do this and we would like to append different message in the same block without having to erase the whole block before updating it with a new message ! Writing a file per messages is not a good solution because there can be a lot of them ! Moreover, this must be efficient and should be life sparing for the flash by avoiding too much erases ! What I would like to be able to do is writing byte after byte into the flash without worrying about bad blocks.

I found “Petit FAT File System” and I’m wondering if this would suite my needs … ?

Could someone tell me if this is possible with “Petit FAT File System” or give me any suggestion on how to handle this ?

Thanks !

Share

Leave an answer

You must login to add an answer.

Need An Account,

1 Answer

  1. Editorial Team

    I haven’t looked into Petit file system, but your real limitation is the NAND flash. The manufacture data sheet will likely indicate how many writes you can successfully make to each block, before an erase is required. It’s possible that there is no hard limit, but the integrity of the data will not be guaranteed after a max write count.

    The answer depends on the process technology and flash cell design. For example, is it SLC or MLC NAND? SLC is going to be able to handle multiple block writes better.

    Another question would be what type of flash controller is on your system? If it uses hardware ECC, then you might be limited by the controller, since 2nd writes will invalidate the ECC value of the 1st data write. If it is possible that you can do ECC calculations in software, then it comes back to the NAND limitation.

    Small write support might be addressed in the data sheet, via a special set aside memory area that might be provided. So again, check the data sheet.

    If you post a link, or indicate what hardware you are using, I can try and give you a more definite answer.

    • 0