Question

In a multi-processor architecture, how are registers organized?

For example, in a 4 cores processor, a minimum of 4 processes can run at a time.
How are stack pointer, program status registers and program counter organized?

What about other general purpose registers?

My guess is, each core will have a separate set of registers.

Answer 1

Imagine 4 completely separate computers, each with a single-core CPU. A 4-core computer is like that; except:

• All CPUs share the same physical address space (and can all use the same RAM, PCI devices, etc)
• Interrupt/IRQ controllers may be designed so the OS can tell it which CPU/s should be interrupted by the IRQ
• CPUs are typically able to signal each other (e.g. “inter-processor interrupts”)
• Some CPUs may share some caches
• Some CPUs may share some control registers (e.g. for things like power management, cache configuration, etc)
• For modern CPUs, some CPUs may share some or all execution units (SMT, hyper-threading, etc)
• For modern systems (where memory controller is built into the physical chip) some CPUs may share the same memory controller

Most of this is “invisible” to most software. Unless you’re writing part of an OS that controls power management, you don’t need to care if power management is shared between CPUs or not; unless you’re writing an OSs/kernel’s low level IRQ handling you don’t need to care how IRQs reach device drivers, etc.

The same applies to how many CPUs actually exist. The OS/kernel normally ensures that applications only need to care about higher level abstractions (e.g. “threads”). How this higher level abstraction works depends on the OS – normally (for most OSs) the OS/kernel attempts to provide the illusion that all threads are running at the same time by switching between them “quickly enough” (where if there’s only 4 CPUs a maximum of 4 threads actually do run at the exact same time), but it’s usually far more complex than this (involving things like thread priorities, pre-emption rules, etc) and (even though it’s relatively rare) it may be very different (e.g. for some systems the same thread may be run on multiple CPUs at the same time for fault tolerance/redundancy purposes; for some systems there might just be a queue of functions and their data, where multiple functions run at the same time; etc).