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In reviewing some system software concepts, I’m looking through my old OS project done on a simulated uniprocessor. I’m wondering how the concepts of locks and semaphores would extend to say a quad-core computing device.
Would you need atomic hardware instruction support, e.g. a test-and-set that synchronizes the cores in hardware? I’m just not sure how this would work out, and what the options are for multiprocessors, that’s my question.
You need something from the hardware. An atomic test-and-set operation is an example of something that you could use. Exactly what you need is actually platform-specific because the problems you need to solve are platform-specific. For example, if your platform has write re-ordering, you need some way to prevent your writes from being re-ordered. If it doesn’t, you don’t.
There’s really no good way to answer this generically.