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Editorial Team
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Asked: 2026-06-02T01:58:11+00:00

Intel’s official optimization guide has a chapter on converting from MMX commands to SSE

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Intel’s official optimization guide has a chapter on converting from MMX commands to SSE where they state the fallowing statment:

Computation instructions which use a memory operand that may not be aligned to a 16-byte boundary must be replaced with an unaligned 128-bit load (MOVDQU) followed by the same computation operation that uses instead register operands.

(chapter 5.8 Converting from 64-bit to 128-bit SIMD Integers, pg. 5-43)

I can’t understand what they mean by “may not be aligned to a 16-byte boundary”, could you please clarify it and give some examples?

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  1. Editorial Team

    Certain SIMD instructions, which perform the same instruction on multiple data, require that the memory address of this data is aligned to a certain byte boundary. This effectively means that the address of the memory your data resides in needs to be divisible by the number of bytes required by the instruction.

    So in your case the alignment is 16 bytes (128 bits), which means the memory address of your data needs to be a multiple of 16. E.g. 0x00010 would be 16 byte aligned, while 0x00011 would not be.

    How to get your data to be aligned depends on the programming language (and sometimes compiler) you are using. Most languages that have the notion of a memory address will also provide you with means to specify the alignment.

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