Question

Is there a way to write a target to

1) only create object files?

2) only to link object files and create the binary file?

I would like to be able create my binary file in 2 steps.

Answer 1

There is an implicit rule for that. Let’s say you have the following Makefile:

CC=cc -g

all: client

client: client.c
    $(CC) client.c -o client

clean:
    -rm -f client

If you only want the object file, then you just need to run:

$ make client.o

And you will get the object file. However, you can also write an explicit rule, such as:

%.o: %.c
    $(CC) -c $<

The previous rule is a rule to build from any .c file to an object (.o) file. $< helps to get the name of file where the rule depends on.

If you have several objects files, you might want to define variables then:

objects = client.o foo.o bar.o

client: $(objects)
    $(cc) -o $@ $(objects)

$(objects): config.h

clean:
    -rm -f client $(objects)

In this case, objects is a variable associated with the object files you want to compile. Which is used in the rule client as a dependency and as argument to link them, it is also used to define rules that depends on header files (config.h in this example), and finalle is used in the clean rule to delete them to start all over again.

$@ is a replacement for the name of the rule. In the last case it would be client.

The manual of GNU Make contains a lot of examples that should enlighten your learn process.