Question

I’ve been reading on Makefiles, but I’m still clueless about how to go about writing the following commands into a Makefile.

gcc -std=c89 A.c -c
gcc -std=c89 B.c -c
gcc -std=c89 C.c -c
gcc -std=c89 A.o B.o -o A
gcc -std=c89 C.o B.o -o C

A and C are dependent on B, but are separate programs.

This is what I came up with which doesnt work:

CC = gcc -std=c89
FILES = A.c B.c C.c
OUT = out
build: $(FILES)
    $(CC) -o $(OUT) $(Files)
clean:
    rm -f *.o core

Answer 1

This is a no gimmicks makefile, and what is before gcc and rm must be the ‘tab’ character, they are not spaces.

all: A C

A.o: A.c
    gcc -std=c89 -c A.c

B.o: B.c
    gcc -std=c89 -c B.c

C.o: C.c
    gcc -std=c89 -c C.c

A: A.o B.o
    gcc -std=c89 -o A A.o B.o

C: C.o B.o
    gcc -std=c89 -o C C.o B.o

clean:
    rm A C a.o b.o c.o core