Question

Lets say my array is 32KB, L1 is 64 KB. Does Windows use some of it while program is running? Maybe I am not able to use L1 because windows is making other programs work? Should I set priority of my program to use all cache?

for(int i=0;i<8192;i++)
{
  array_3[i]+=clock()*(rand()%256);//clock() and rand in cache too?
  //how many times do I need to use a variable to make it stay in cache?
  //or cache is only for reading? look below plz
  temp_a+=array_x[i]*my_function();
}

The program is in C/C++.

Same thing for L2 too please.

Also are functions kept in cache? Cache is read only? (If I change my array then it loses the cache bond?)

Does the compiler create the asm codes to use cache more yield?

Thanks

Answer 1

How can i know my array is in cache?

In general, you can’t. Generally speaking, the cache is managed directly by hardware, not by Windows. You also can’t control whether data resides in the cache (although it is possible to specify that an area of memory shouldn’t be cached).

Does windows use some of it while program is running? Maybe i am not able to use L1 because windows is making other programs work? Should i set priority of my program to use all cache?

The L1 and L2 caches are shared by all processes running on a given core. When your process is running, it will use all of cache (if it needs it). When there’s a context switch, some or all of the cache will be evicted, depending on what the second process needs. So next time there’s a context switch back to your process, the cache may have to be refilled all over again.

But again, this is all done automatically by the hardware.

also functions are kept in cache?

On most modern processors, there is a separate cache for instructions. See e.g. this diagram which shows the arrangement for the Intel Nehalem architecture; note the shared L2 and L3 caches, but the separate L1 caches for instructions and data.

cache is read only?(if i change my array then it loses the cache bond?)

No. Caches can handle modified data, although this is considerably more complex (because of the problem of synchronising multiple caches in a multi-core system.)

does the compiler create the asm codes to use cache more yield?

As cache activity is generally all handled automatically by the hardware, no special instructions are needed.