Question

MIPS arcitecture program space has kuseg,kseg0,kseg1 and kseg2 memory segments.
Is there any historical and logical reason behind this division?

Answer 1

There are logical reasons for the existence of the memory segments:

1. Caches in MIPS need to be initialized by boot code, (unlike x86 caches which are initialized by the hardware).
2. The memory management unit (MMU) in embedded systems is optional, so it is useful to have explicit physical memory regions reserved for the kernel, and not accessible by user mode code.

Here is what the regions are used for:

• KSEG1 addresses are uncached and are not translated by the MMU. KSEG1 is the only memory region that can be used at reset because the MMU and caches on MIPS CPUs must be configured by the boot code, which must be placed in KSEG1.

• KSEG0 provides an address region for the kernel that is cached, but not mapped by the MMU.

• KSEG2 is used for kernel mode code that is mapped by the MMU and cached.

• KUSEG is used for user mode code that is mapped by the MMU and cached.