Question

My code uses one macro which I am defining during the build as follows.

gcc -D VAR=1000 main.c -0 main

But I want to create two executable, one with VAR=1000 and other with VAR=2000. Lets say executable names would be main_1000 and main_2000.

How can I do that using Makefile.

My attempt to do that is as follows. But it does not work and gives me an error.

gcc -g   -c -o main.o main.c
main.c: In function ‘main’:
main.c:5:16: error: ‘VAR’ undeclared (first use in this function)
main.c:5:16: note: each undeclared identifier is reported only once for each function it appears in
make: *** [main.o] Error 1

Makefile:

CC=gcc
CFLAGS=-g

all: main_1000 main_2000

main_1000: main.o
    $(CC) -D VAR=1000 -o main_1000 main.o $(CFLAGS)

main_2000: main.o
    $(CC) -D VAR=2000 -o main_2000 main.o $(CFLAGS)

Answer 1

main_1000: main.o

This implies that you already expect main.o to be there. Since there’s no rule for compiling a c file to an o file, make uses its implicit rule, which doesn’t include the definition. What you want instead is this:

CC=gcc
CFLAGS=-g

all: main_1000 main_2000

main_1000: main.c
    $(CC) -D VAR=1000 -o $@ $^ $(CFLAGS)

main_2000: main.c
    $(CC) -D VAR=2000 -o $@ $^ $(CFLAGS)