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Asked: 2026-05-25T15:10:22+00:00

Please have a look at this Single Cycle Data Path in MIPS . The

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Please have a look at this Single Cycle Data Path in MIPS. The 26 bits of J type instruction are being Bit Extended to 28. I don’t get the point. Shouldn’t it be extended to 31 so it makes 32 bits overall. Please help me out to clear the concept.
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  1. Editorial Team

    This is really no sign extension. Recall that the instructions in MIPS are 4-byte aligned.

    This means that you can start an instruction at addresses which are 0 modulus 4 (i.e. 0, 4, 8, 12, …)

    Now, doing a shift left of 2 two bits is like multiplying by 4, which yields numbers which are always 0 modulus 4.

    The actual address will be formed with:
    – the 4 most significant bits of the nPC (that is PC+4) (lets call them PPPP)
    – the 26 bits of the address field specified in the instruction, (lets call them AAA….AA)
    – 00 as the two least significant bits (which yields the required instruction alignment)

    Thus the address will be (binary) PPPPAAAAAAAAAAAAAAAAAAAAAAAAAA00

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