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Reading through some great presentations on low latency computing. They had a reference to IBM’s XL C/C++ compiler data cache operation __dcbt (Data Cache Block Touch) for their cell compiler. The operation loads a block of memory into L1 cache.
Does Visual Studio (or G++ or Intel) have similar functionality for Intel Processors? If so and the solution is platform specific (i.e. Windows or *nix only) please say so.
Yes, Visual Studio supports all the SSE and MMX intrinsic operations. The cache control operations are briefly described here: http://www.tommesani.com/SSECacheabilityControl.html
and explained at length in Intel’s instruction set reference.
Microsoft documents their intrinsics for cache control at MSDN. Although they look like functions, the compiler actually boils them down to the appropriate hardware instruction. Be sure to look at both their SSE1 and SSE2 cache control instructions, which they list under separate categories (see the expanding tree on the left side of their page).
The x86 equivalent to
dcbtis_mm_prefetch. There is no direct equivalent todcbz, but the closest analogue is_mm_stream_si128.I believe GCC uses the same intrinsic names (as they are taken from the Intel compiler).