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Home/ Questions/Q 6616997
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Editorial Team
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Editorial Team
Asked: May 25, 20262026-05-25T20:39:05+00:00 2026-05-25T20:39:05+00:00

Since the RBPI (Raspberry Pi) has very low power consumption and very low production

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Since the RBPI (Raspberry Pi) has very low power consumption and very low production price, it means one could build a very big cluster with those. I’m not sure, but a cluster of 100000 RBPI would take little power and little room.

Now I think it might not be as powerful as existing supercomputers in terms of FLOPS or others sorts of computing measurements, but could it allow better neuronal network simulation ?

I’m not sure if saying “1 CPU = 1 neuron” is a reasonable statement, but it seems valid enough.

So does it mean such a cluster would more efficient for neuronal network simulation, since it’s far more parallel than other classical clusters ?

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  1. Editorial Team
    Editorial Team
    2026-05-25T20:39:05+00:00Added an answer on May 25, 2026 at 8:39 pm

    Using Raspberry Pi itself doesn’t solve the whole problem of building a massively parallel supercomputer: how to connect all your compute cores together efficiently is a really big problem, which is why supercomputers are specially designed, not just made of commodity parts. That said, research units are really beginning to look at ARM cores as a power-efficient way to bring compute power to bear on exactly this problem: for example, this project that aims to simulate the human brain with a million ARM cores.

    http://www.zdnet.co.uk/news/emerging-tech/2011/07/08/million-core-arm-machine-aims-to-simulate-brain-40093356/ “Million-core ARM machine aims to simulate brain”

    http://www.eetimes.com/electronics-news/4217840/Million-ARM-cores-brain-simulator “A million ARM cores to host brain simulator”

    It’s very specialist, bespoke hardware, but conceptually, it’s not far from the network of Raspberry Pis you suggest. Don’t forget that ARM cores have all the features that JohnB mentioned the Xeon has (Advanced SIMD instead of SSE, can do 64-bit calculations, overlap instructions, etc.), but sit at a very different MIPS-per-Watt sweet-spot: and you have different options for what features are included (if you don’t want floating-point, just buy a chip without floating-point), so I can see why it’s an appealing option, especially when you consider that power use is the biggest ongoing cost for a supercomputer.

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