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Asked: 2026-05-20T11:58:56+00:00

Sometimes GCC generates this instruction when compiling with -march=atom . Does each and every

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Sometimes GCC generates this instruction when compiling with -march=atom. Does each and every Intel Atom CPU support MOVBE?

What other processors support this instruction? I can’t seem to find this information on Intel website. Please help.

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  1. Editorial Team

    This instruction was originally unique to the Intel® Atom™ processor.

    From Intel side:

    The Intel® Compilers 11.0 allow you
    to target the Intel® Atom™ processor
    using the /QxSSE3_ATOM or -xSSE3_ATOM
    compiler options. These options
    enable the generation of the movbe
    instruction which is unique to the
    Intel® Atom™ processor.

    In other microarchitectures (http://instlatx64.atw.hu/ with uop info from https://agner.org/optimize/):

    • Mainstream Intel: Haswell and later. Including Haswell Xeon (Ex-xxxx v3).
      Decodes as 2 or 3 uops, about the same as bswap + load or store.
    • Mainstream AMD: Excavator, and Ryzen-family. Steamroller and earlier don’t have it.
      Decodes efficiently to a single uop.

    non-mainstream CPUs:

    • Legacy in-order Intel Atom: all
    • Intel Silvermont-family out-of-order Atom: all. Decodes efficiently to a single uop.

    • AMD Jaguar. Decodes efficiently to a single uop.

    • Intel Xeon Phi: Knight’s Landing (based on Silvermont) and later. (Maybe not on Knight’s corner.)

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