Sign Up

Sign Up to our social questions and Answers Engine to ask questions, answer people’s questions, and connect with other people.

Have an account? Sign In

Have an account? Sign In Now

Sign In

Login to our social questions & Answers Engine to ask questions answer people’s questions & connect with other people.

Sign Up Here

Forgot Password?

Don't have account, Sign Up Here

Forgot Password

Lost your password? Please enter your email address. You will receive a link and will create a new password via email.

Have an account? Sign In Now

You must login to ask a question.

Forgot Password?

Need An Account, Sign Up Here

Please briefly explain why you feel this question should be reported.

Please briefly explain why you feel this answer should be reported.

Please briefly explain why you feel this user should be reported.

Sign InSign Up

The Archive Base

The Archive Base Logo The Archive Base Logo

The Archive Base Navigation

  • SEARCH
  • Home
  • About Us
  • Blog
  • Contact Us
Search
Ask A Question

Mobile menu

Close
Ask a Question
  • Home
  • Add group
  • Groups page
  • Feed
  • User Profile
  • Communities
  • Questions
    • New Questions
    • Trending Questions
    • Must read Questions
    • Hot Questions
  • Polls
  • Tags
  • Badges
  • Buy Points
  • Users
  • Help
  • Buy Theme
  • SEARCH
Home/ Questions/Q 4323772
In Process

The Archive Base Latest Questions

Editorial Team
  • 0
Editorial Team
Asked: May 21, 20262026-05-21T09:02:44+00:00 2026-05-21T09:02:44+00:00

SSE and/or 3D now! have vector instructions, but what do they optimize in practice

  • 0

SSE and/or 3D now! have vector instructions, but what do they optimize in practice ? Are 8 bits characters treated 4 by 4 instead of 1 by 1 for example ? Are there optimisation for some arithmetical operations ? Does the word size have any effect (16 bits, 32 bits, 64 bits) ?

Does all compilers use them when they are available ?

Does one really have to understand assembly to use SSE instructions ? Does knowing about electronics and gate logics helps understanding this ?

  • 1 1 Answer
  • 0 Views
  • 0 Followers
  • 0
Share
  • Facebook
  • Report

Leave an answer
Cancel reply

You must login to add an answer.

Forgot Password?

Need An Account, Sign Up Here

1 Answer

  • Voted
  • Oldest
  • Recent
  • Random
  1. Editorial Team
    Editorial Team
    2026-05-21T09:02:44+00:00Added an answer on May 21, 2026 at 9:02 am

    Background: SSE has both vector and scalar instructions. 3DNow! is dead.

    It is uncommon for any compiler to extract a meaningful benefit from vectorization without the programmer’s help. With programming effort and experimentation, one can often approach the speed of pure assembly, without actually mentioning any specific vector instructions. See your compiler’s vector programming guide for details.

    There are a couple portability tradeoffs involved. If you code for GCC’s vectorizer, you might be able to work with non-Intel architectures such as PowerPC and ARM, but not other compilers. If you use Intel intrinsics to make your C code more like assembly, then you can use other compilers but not other architectures.

    Electronics knowledge will not help you. Learning the available instructions will.

    • 0
    • Reply
    • Share
      Share
      • Share on Facebook
      • Share on Twitter
      • Share on LinkedIn
      • Share on WhatsApp
      • Report

Sidebar

Related Questions

I am new to optimizing code with SSE/SSE2 instructions and until now I have
This is a somewhat low-level question. In x86 assembly there are two SSE instructions:
Is there any difference between logical SSE intrinsics for different types? For example if
I have some problem with SSE on ubuntu linux system. example source code on
I am interested in using the SSE vector instructions of x86-64 with gcc and
Where does the x86-64's SSE instructions (vector instructions) outperform the normal instructions. Because what
I have an application that was developed for Linux x86 32 bits. There are
I have to implement matrix-vector multiplication using sse/sse2. Vector and matrix are large. Matrix
I have noticed that sometimes MSVC 2010 doesn't reorder SSE instructions at all. I
I am designing a series of Vector classes in C++ that support SSE(SIMD). The

Explore

  • Home
  • Add group
  • Groups page
  • Communities
  • Questions
    • New Questions
    • Trending Questions
    • Must read Questions
    • Hot Questions
  • Polls
  • Tags
  • Badges
  • Users
  • Help
  • SEARCH

Footer

© 2021 The Archive Base. All Rights Reserved
With Love by The Archive Base

Insert/edit link

Enter the destination URL

Or link to existing content

    No search term specified. Showing recent items. Search or use up and down arrow keys to select an item.