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Asked: 2026-06-01T00:54:29+00:00

The reference manual is inconsistent when talking about low power modes on the iMX27.

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The reference manual is inconsistent when talking about low power modes on the iMX27. I would like to have two functions: doze() and sleep() that configure the CPU and clocks to properly enter these low power modes but the examples in the manual don’t seem to work. I looked at the Linux kernel code and that was some help, but I thought I would ask here if anyone has any code (arm assembly is best) for these functions already.

DOZE:
Doze mode is defined as when the ARM9 executes a wait for an interrupt instruction, after which the buffered clock supply to the MCU is turned off.
The sequence of operation to set the system to Doze mode is as follows:

  1. Enable desired interrupts for wake-up from Doze mode.
  2. Disable watchdog timer interrupt.
  3. Execute wait-for-interrupt instruction.

SLEEP:

Sleep mode is defined as when all the DPLLs clock outputs are disabled. A sequence of operations and criteria must be satisfied before the system turns off the MPLL and SPLL. The Sleep mode sequence is initiated when the MPEN bit in the CSCR register is cleared disabling the MPLL. This action also automatically turns off the SPLL.
The sequence to put the system into Sleep mode is as follows:

  1. Disable AHB peripherals from bus accesses.
  2. Enable desired interrupts to be used for system wake-up.
  3. Disable watchdog timer interrupt.
  4. Set the required value to the SD_CNT (CSCR register) for shutdown countdown.
  5. Disable the MPLL by clearing the MPEN bit (CSCR register).
  6. Execute wait-for-interrupt instruction.

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1 Answer

  1. Editorial Team

    There really isn’t much to going into Doze mode (in C surround this code with asm ( );):

          " MCR p15, 0, r1, c7, c0, 4 \n"

    will do the trick for you. You will need to setup all the required interrupts first.

    For sleep mode, here is some assembly

             " MOV R0,#+268435456 \n"
         " ORR R0,R0,#0x27000 \n"
         " LDR r1, [r0, #0x0] \n"
         " ORR r1, r1, #0x01000000 \n"
         " STR r1, [r0, #0x0] \n"
         " BIC r1, r1, #0x00000001 \n"
         " STR r1, [r0, #0x0] \n"
        " MCR p15, 0, r1, c7, c0, 4 \n"

    where #+268435456 is the address for CSCR register. This code will set SD_CNT to 1, disable the MPLL, and then go into a WFI. Again, you will need to configure the interrupts first, as well as disabling all the peripherals.

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