Question

This is my homework. I’m looking for help on how to a make a “makefile” that will compile three source files. Of which will be named “timestable.c tablein.c tableout.c timestable.h”. Those are the four source files. I have created a makefile to do this, which I believe is correct, but I’m not sure how to test it to see if it will compile? Here is the content of my makefile:

timestable.exe: timestable.c tablein.c tableout.c timestable.h
    cl timestable.c tablein.c tableout.c timestable.h 

Is this correct? This makefile has to build a program called timestable.exe using the Visual Studio cl command and to provide the clean functionality. I don’t understand what I am being told when the teacher mentioned the “clean” functionality. I’m not sure if this makefile actually works to create this file, because I’m not sure how to run it.

Also, if you guys don’t mind giving me a link or telling me some more info on makefile commands for a windows based system. I wish to create and “extra feature” in my makefile because doing so will grant me better marks, and I do not know what more I could do.

Thanks ahead of time.

BIG EDIT:
So, after playing around a bit, I figured out that if I change the makefile.txt file to makefile.bat and I open my visual studio cmd prompt, get into the correct directory and type in (I’m aware I do not have to run the cmd promt in order to run the .bat file) :

 makefile.bat 

it will attempt to compile all the files. The issue, is it does not work with the “.h” file, specifitcly the timestable.h file. Also, the “timestable.exe” command didn’t work. Any idea on what to do here?

Answer 1

(Incidentally, what happens if you run cl timestable.c tablein.c tableout.c timestable.h by hand?)

You’d normally want to write your Makefile to compile your .c files to .obj files using pattern rules that know how to compile a single .c file into an .obj file and then another rule that knows how to link all the .obj files into a single executable object. (One important benefit is that this allows rebuilding only the parts that have changed. Your Makefile so far will require recompiling all inputs file any time any one changes.)

When you have so many .obj files laying around, you might want a make clean that removes all the object files and executable files that can be rebuilt from sources. That might be as simple as declaring clean to be a phony target and then deleting all the files that can be rebuilt.

Note that Makefiles are by convention named Makefile or makefile or GNUmakefile. (GNU make actually searches for the files in the reverse order to this list, but Makefile is the only name I like.) If you use one of these names, then you can just run make foo to run the foo target. If you pick a different name for your Makefile then you also need to use the -f filename command line option to pick the other file, and that is annoying. Sometimes necessary.)