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Asked: 2026-06-13T08:38:47+00:00

To avoid bank conflicts in sheared memory I need to know the number of

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To avoid bank conflicts in sheared memory I need to know the number of banks and the bank size. As far as I know, for devices with compute capability 1.1 – 1.3 it’s 16 banks with 32-bit element size. I have Tesla C2075 (compute capability 2.0). Do I have the same values and where can I find this? (I haven’t found this in “cudaDeviceProp” information). By the way, I would be thankful if somebody gives me a link to some doc with all technical information about my CUDA device. One more think, I need to work with doubles, so I really hope, the bank size is 64 bit. If it’s not, what kind of bank conflicts should I expect?

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  1. Editorial Team

    The information you are looking for is in the cuda programming guide.
    Appendix F.4.3 for cc 2.0.

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