Question

when using a makefile, I want the following to be possible:

make clean  
make Clean  
make CLean
make CLEan
make CLEAn
make ... 

and have all to do the same thing in my makefile.
(ie. I don’t want make goals to be case sensitive)

Sure, I could just write every possibly like this:

.PHONY clean Clean CLean CLEan CLEAn ... 
clean Clean CLean CLEan CLEAn ...:  
    $(DELETE_STUFF)

but I think you can see why this is not desired..
I know that ‘make’ has a built in macro called: MAKECMDGOALS which will be equal to whatever you type after typing make.

for example, running 'make clean all backup'   
$(MAKECMDGOALS) = "clean all backup"  

I tried to do this at the top of my makefile:

MAKECMDGOALS:= $(shell echo $(MAKECMDGOALS) | tr "[:upper:]" "[:lower:]")

it does change the variable to all lowercase, but will still only call the rule for the target goal typed.

I’ve even tried to override it like this:

override MAKECMDGOALS:= $(shell echo $(MAKECMDGOALS) | tr "[:upper:]" "[:lower:]")

in hopes that will be done sooner, yet no success.

I was going to make a target like this:

$(MAKECMDGOALS):
MAKECMDGOALS:= $(shell echo $(MAKECMDGOALS) | tr "[:upper:]" "[:lower:]")
#BUT I CAN'T CALL OTHER TARGETS FROM THE SHELL  

I know it’s a silly detail to fuss over, but surely there has got to be a way right?

Answer 1

Crude but effective:

%:
        $(MAKE) $(shell echo $@ | tr "[:upper:]" "[:lower:]")

clean:
        delete_stuff