Which parameters decide the size of data type for a processor?
Is it the data bus which decides this?
Or is it the Instruction Set Architecture?
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The maximum width or the maximum amounts of bits a processor can deal with at the same time at a given time is specific to the particular processor you’re using and would be decided by the width of it’s data bus and also the width of all the data lines inside the CPU.
Essentially a CPU can operate on a certain amount of high’s and low’s (in terms of voltage) at any particular time, so I guess if you’ve got a 32bit CPU, it will have 32 physical lines in parallel on which it operates.
EDIT: Seems after a bit of research on this, that my answer is wrong, it’s the internal register size of the CPU that determines it’s size.
I’m no expert in CPU architecture, so I can’t provide more detail.