Question

Follow-up: Set up a development environment on Linux targeting Linux and Windows

The project dir looks like this:

/pps
    /src
    /obj
    /bin
    Makefile

And the content of Makefile is this:

OBJ_DIR = obj
SRC_DIR = src
BIN_DIR = bin

INCLUDE = -I./$(SRC_DIR)
LIBS = 

_SRCS = print_current_dir.c test_main.c

_OBJS = print_current_dir.o test_main.o

SRCS = $(addprefix $(SRC_DIR)/,$(_SRCS))
OBJS = $(addprefix $(OBJ_DIR)/,$(_OBJS))

$(OBJ_DIR)/%.o: %.c %.h
    $(CC) -c -o $(OBJ_DIR)/$@ $< $(CFLAGS)

all: $(BIN_DIR)/pps-linux $(BIN_DIR)/pps-win32

$(BIN_DIR)/pps-linux: $(OBJS)
    CC = cc
    CFLAGS = -g -Wall $(INCLUDE) $(LIBS)

$(BIN_DIR)/pps-win32: $(OBJS)
    CC = i586-mingw32msvc-cc
    CFLAGS = -g -Wall $(INCLUDE) $(LIBS)

.PHONY: clean

clean:
    rm -f $(OBJS) $(SRC_DIR)/~ core $(BIN_DIR)/*

The files print_current_dir.c and test_main.c are just for testing.

This makefile doesn’t work:

$ make
make: *** No rule to make target `obj/print_current_dir.o', needed by `bin/pps-linux'.  Stop.

I think the problem is with the %.o rule. I’m sure it is trivial, but I’m not very experienced with make.

Thank you.

Answer 1

This rule:

$(OBJ_DIR)/%.o: %.c %.h

specifies that obj/foo.o depends on foo.c, not src/foo.c. There is no foo.c, so this rule cannot be applied (hence the error message).

This should do the job:

$(OBJ_DIR)/%.o: $(SRC_DIR)/%.c $(SRC_DIR)/%.h