How many instructions are flushed when a jump instruction is executed?
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The number of instructions is based on many, many variables, but for MIPS essentially comes down to the size of the pipeline in stages. For a 5-stage pipeline there are up to 5 instructions in some stage of execution at any given point in time. There could be less, as the pipeline could be not full after a context switch or a fault.
For out-of-order execution, you will get a variable number of instructions depending on the instruction stream coming in, among other things.
For a processor that has a separate FPU outside (or any other co-processor, for that matter) may have more instructions still.