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Editorial Team
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Asked: 2026-05-26T15:58:23+00:00

I have a makefile with multiple targets that are generated by copying a file

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I have a makefile with multiple targets that are generated by copying a file from outside the working directory.

a.tex   : $(wildcard /foo/work1/a.tex)
    cp -p $< $@

b.tex   : $(wildcard /foo/work2/b.tex)
    cp -p $< $@

I use $(wildcard) because sometimes I run Make on systems that do not have access to /foo.

What is the best way to avoid repeating the cp -p $< $@ commands for every rule? Some options:

  • Setting up a %.tex : %.tex rule. This works, but it also applies to targets that aren’t specifically indicated so I get lots of warnings like make: Circular a.tex <- a.tex dependency dropped.
  • Defining a sequence of commands with define. This seems pointless since the command is only one line. So instead of copying cp $< $@ to every rule, I’d define a cp-dep sequence and copy cp-dep to every rule.
  • Defining the command as a variable so that I could do a.tex : $(wildcard /foo/work1/a.tex); $(CP-DEP)
  • Duplicating the target names as an additional rule. a.tex b.tex : ; cp -p $< $@. Error-prone.
  • Just copying and pasting. Clunky but effective and easy to understand.
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1 Answer

  1. Editorial Team

    I ended up doing this:

    COPYFILES = /foo/work1/a.tex /foo/work2/b.tex

define copyrule
$(notdir $(1)): $$(wildcard $(1))
    cp -p $$< $$@
endef
$(foreach file,$(COPYFILES),$(eval $(call copyrule,$(file))))

    The advantage of this method is that I can easily add new files with a minimum of boilerplate text and I can easily copy the rule part of this to a new Makefile. The disadvantages are that I can no longer change the destination filename, and the implementation is rather opaque for people with less makefile experience.

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