Question

Is there a way to alter the cache write policy while working with the Intel compiler. I discovered that the Intel Core i7 processor 1st-level cache is a write back cache.

My question is: Is there any possible way to tweak the compiler into changing the cache policy from write back to write through?

Answer 1

From reading Understanding the Linux Kernel, I’m led to believe this is possible, although I’ve never done it myself. Quoting:

The CD flag of the cr0 processor register is used to enable or disable
the cache circuitry. The NW flag, in the same register, specifies
whether the write-through or the write-back strategy is used for the
caches.

It is also possible to control cache policy on a per-page basis, by setting flags in the page table. I suspect that the Intel compiler will have a feature to specify the behaviour of individual memory allocations; I’ve certainly seen this on Fortran compilers.

How much of this applies specifically to the i7, I don’t know.