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Home/ Questions/Q 36377
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Asked: May 10, 20262026-05-10T14:23:01+00:00 2026-05-10T14:23:01+00:00

This is a somewhat low-level question. In x86 assembly there are two SSE instructions:

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This is a somewhat low-level question. In x86 assembly there are two SSE instructions:

MOVDQA xmmi, m128

and

MOVNTDQA xmmi, m128

The IA-32 Software Developer’s Manual says that the NT in MOVNTDQA stands for Non-Temporal, and that otherwise it’s the same as MOVDQA.

My question is, what does Non-Temporal mean?

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  1. 2026-05-10T14:23:01+00:00Added an answer on May 10, 2026 at 2:23 pm

    Non-Temporal SSE instructions (MOVNTI, MOVNTQ, etc.), don’t follow the normal cache-coherency rules. Therefore non-temporal stores must be followed by an SFENCE instruction in order for their results to be seen by other processors in a timely fashion.

    When data is produced and not (immediately) consumed again, the fact that memory store operations read a full cache line first and then modify the cached data is detrimental to performance. This operation pushes data out of the caches which might be needed again in favor of data which will not be used soon. This is especially true for large data structures, like matrices, which are filled and then used later. Before the last element of the matrix is filled the sheer size evicts the first elements, making caching of the writes ineffective.

    For this and similar situations, processors provide support for non-temporal write operations. Non-temporal in this context means the data will not be reused soon, so there is no reason to cache it. These non-temporal write operations do not read a cache line and then modify it; instead, the new content is directly written to memory.

    Source: http://lwn.net/Articles/255364/

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