Question

I just discovered that the ARM I’m writing code on (Cortex M0), doesn’t support unaligned memory access.

Now in my code I use a lot of packed structures, and I never got any warnings or hardfaults, so how can the Cortex access members of these structures when it doesnt allow for unaligned access?

Answer 1

Compilers such as gcc understand about alignment and will issue the correct instructions to get around alignment issues. If you have a packed structure, you will have told the compiler about it so it know ahead of time how to do alignment.

Let’s say you’re on a 32 bit architecture but have a struct that is packed like this:

struct foo __attribute__((packed)) {
   unsigned char bar;
   int baz;
}

When an access to baz is made, it will do the memory loads on a 32 bit boundary, and shift all the bits into position.

In this case it will probably to a 32 bit load of the address of bar and a 32 bit load at the address of bar + 4. Then it will apply a sequence of logical operations such as shift and logical or/and to end up with the correct value of baz in a 32 bit register.

Have a look at the assembly output to see how this works. You’ll notice that unaligned accesses will be less efficient than aligned accesses on these architectures.