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Asked: 2026-05-26T01:04:22+00:00

My Makefile looks like this: BIN = bin OBJECTS = object1.o \ object2.o \

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My Makefile looks like this:

BIN     = bin
OBJECTS = object1.o \
          object2.o \
          object3.o
HDR     = $(OBJECTS:%.o=%.h) header1.h header2.h
MAIN    = main.c

CC      = gcc
CFLAGS  = -Wall -g -std=c99 -fstack-protector-all
LDFLAGS = -lpthread

$(BIN): $(OBJECTS) $(MAIN)
    $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^

%.o: %.c $(HDR)
    $(CC) $(CFLAGS) -c $< -o $@

It seems that the %.o: %.c $(HDR) rule is not used. When invoking with option make -r it says that there’s no rule to make target object.o. The build of each object file should depend on every header file. What am I missing?

Edit: I should mention that when doing echo $(HDR) than it looks like the variable contains the right values:
object1.h object2.h object3.h header1.h header2.h

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1 Answer

  1. Editorial Team

    Ok, the given Makefile should work, I had a typo in one of the header file names.

    It’s a pitty, but make doesn’t warn about that. It seems that when a pattern based rule is missing a prerequisite than it’s just ignored. The built-in .o creation rule is used instead.

    Jonathan Leffler’s proposal of ${OBJECTS}: ${HDR} brought that up, because than there’s an error regarding “no rule to make target misspelled.h” – I would have expected that from my rule too.

    So I can just agree to fluffy, it’s better to use auto-generated dependencies instead.

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